Top 5 Beginner PCB Design Mistakes (and how to fix them)

Learn the most common beginner PCB design mistakes that can negatively impact EMI and SI, as well as how to fix them. Check out tips and tricks on trace widths, clearances, decoupling, vias, and more! Created by Philip Salmony, Tech Consultant for Altium and the mind behind Phil’s Lab.

00:00 Introduction
00:42 #1 Trace Spacing
03:40 #2 Trace Widths
06:01 #3 Via Sizing
08:21 #4 Decoupling
10:46 #5 Reference Planes

👉 For More Tech Consultant Philip Salmony from Phil’s Lab Videos, click here:

👉 For More PCB Design for Beginners Videos, click here:

👉 Exclusive One Month Free Altium Designer Access:

👉 Check Out Phil’s Channel Phil’s Lab:

Don’t forget to follow us on social to stay up-to-date on the latest Altium Academy content.
👉 Follow Altium on Twitter:
👉 Follow Altium on Linkedin:
👉 Follow Altium on Facebook:

👉 Ready to try the industry’s best-in-class design experience yourself? Download it today and get started!

The Altium Academy is an online experience created to bring modern education to PCB Designers and Engineers all across the world. Here you can access a vast library of free training and educational content covering everything from basic design to advanced principles and step-by-step walkthroughs. Join industry legends as they share their career knowledge, review real-life design projects, or learn how to leverage one of Altium’s leading design tools. No matter your level of experience, the Altium Academy can help you become a better Designer and Engineer!

About Altium LLC
Altium LLC (ASX:ALU), a global software company based in San Diego, California, is accelerating the pace of innovation through electronics. From individual inventors to multinational corporations, more PCB designers and engineers choose Altium software to design and realize electronics-based products.

#Altium #PCBdesign #AltiumDesigner

What do you think?

Written by HuntingBP

Leave a Reply

Your email address will not be published.

GIPHY App Key not set. Please check settings


  1. Wouldn't you want to place the decouppling capacitor closest to the IC and THEN place the VIAs (so your arrangement would look as following: VIA -> capacitor pad -> IC power pin)? Since with your arrangement, in the instant of the IC requirimg more current the direction of flow of current will be capacitor -> VIA -> IC and … -> VIA -> IC pad and after that, when charge will be moved back to the capacitor the direction of flow of current will be … -> VIA -> IC and … -> VIA -> capacitor. This would result in a much bigger change of the electromagnetic field, compared to having a uniform direction of flow of current from the "VIA -> capacitor -> IC"-arrangement.
    Edit: please correct me if I'm wrong

  2. Unfortinally at the decoupling section, its wrong to put the vias at the position where you put them! The power should flow over a capacitor into the pin, so the vias MUST be located behind the capacitor and not between capacitor and uC Pin. For several reasons: first and more obvious, is at doing like that, you are decreasing inductance of the trace, and by doing like that current flows only in one direction, and not splitting into 2 ways, and third reason is, by not doing like that you are increasing the electromagnetic radiation.

  3. Very inspiring and thoughtful video, congrats. However, there's something I just don't get it: in 4:10 you've claimed that for high impedance signals one must reduce traces width. I believe you, but there is any chance that you point me out to the theory behind such statement? My first thoughts are on impedance matching fact, however I want to be sure, and if I'm wrong, to understand your claim Thank you in advanced! 😀

  4. Hi Phil, Glad to see you here.
    I'd like to point out 09:55 where you placed vias between MCU and Capacitor.
    Robert Feranec discouraged this practice saying the capacitor will have not help much cuz it is out of the way.
    He recommended Power trace should pass through the pad of capacitor.
    See his video series where he created magic wand Board.
    Can you explain what's better to do?

  5. Despite being an Aussie and using metric my entire life I've used imperial 0.1" scale literally since the first days of Protel. My brain just can't work back to using mm for pcb stuff 🙁

  6. a real design flaw is to put a 48 volt backlight power trace next to the data trace on the ribbon cable to the display where it could arc over and blow the cpu.

    on certain macbooks there was a flaw where the 48 volt backlight trace was next to the data trace that goes to the cpu so if the backlight circuit was to arc over it would fry the cpu.

    having the decoupling caps close to the power rails makes better security sense if you intend to pot the chip you can include the decoupling caps in the blob of plastic so it would not be so easy for a hacker to glitch the device and dump the firmware.

    the apple air tag was hacked because apple placed the decoupling caps far enough away from the chips that someone was able to solder onto the the caps and glitch the device and bypass the built in anti dumping of the firmware.

  7. Lack of copper balance on inner layers is also one of them. You cant expect to have the same prepreg thickness on a layer with 10% copper as on a layer with 80% on the same PCB. Designers need to learn that good copper balance of at least 80% is king.

  8. The recommendation of vias between bypass cap and device pad is just plain wrong.
    When you look at the model of noise conducted trough such an arrangement, this is a poor choice. Always place the bypass cap between the device power pins and the vias to the power layers. There are multiple applications notes that cover this from Linear Technology and similar companies. Also ANY extra trace length between power pins lowers the resonance frequency of noise. Refer to Renesas App note #AN1325 for general overview. My old friend, the late, great Jim Williams, has written several articles and covers some of this in his books. I suggest you read them to better understand the reason why in almost all situations placing the via Between the capacitor and device pins is a really bad idea.

  9. I designed a pcb with all the components but I don't think I will ever get an actual PCB because I can't route the traces. It's much harder than I thought when it gets complex. I put 2x 40pin connections and a transistor per pin but I can't get it all routed properly. Oh well, it was fun to make the circuit, it will just never be a product unfortunately.

  10. i'm pretty sure that the last one, at least as demonstrated, should not be even considered to be a mistake, not one little bit. Just the solder joint on the chip the trace goes from is probably an order of magnitude more of a disruption, than the tiny bit of opening of the round plane below a tiny fraction of the length of the track.

DIY deer blind stand Part 2

Cartblinds™ Duck-Cart™